Oregano Eval Board

The syn1588® VIP is a highly integrated single-chip IEEE1588 solution. Just connect the syn1588® VIP to the Ethernet network and receive highly accurate synchronized time or frequency.

System Features

The syn1588® VIP is available in two different flavors:

  • syn1588® VIP IP Core
  • syn1588® VIP evaluation board
System Features
  • clock accuracy better than 20 ns
  • single chip IEEE1588 solution
  • embedded system solution suited for smooth integration into your FPGA/ASIC or board design
  • IEEE1588 hardware timestamping support using syn1588® technology
  • Oregano Systems’ patented 1-step timestamping
  • generation of
    • programmable frequency
    • 1 PPS
    • pseudo GPS data stream
    • IRIG-B
  • master or slave operation
  • synchronisation in master mode to absolute time reference (e.g. GPS receiver)
  • several high precision oscillator options
  • remote management and configuration via IEEE1588 management messages
  • optional non-volatile storage of configuration in external SPI flash
  • remote firmware update capability (for syn1588® VIP evaluation board)


Application: Distribute accurate time to embedded IEEE1588 slaves
The absolute time is distributed from an IEEE1588 grandmaster to embedded IEEE1588 slave nodes based on Oregano Systems‘ syn1588® VIP with an accuracy of 10 ns or better. The time information is locally used at the slave to generated synchronized frequencies or for generating pseudo GPS data.

Basically this system acts as a distributed PLL.

Application: Implement an IEEE1588 grandmaster
A syn1588® VIP may act as an IEEE1588 Grandmaster on your network.
The syn1588® VIP may synchronize its local hardware clock to an external absolute time reference like e.g. a GPS receiver.


The syn1588® VIP acts basically like a GPS receiver without the need for an antenna. It supplies a 1 PPS pulse and a NMEA compatible data stream on the serial interface (of course without positional data). In master mode syn1588® VIP can accept GPS data as input.

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